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| Section | Weight | Objectives |
|---|---|---|
| Topic 1: Upgrades | 32% | - Non-disruptive upgrades (NDU) - Purity version interoperability - Controller and shelf upgrades - Firmware and component updates |
| Topic 2: Pre-Installation / Pre-Upgrade | 25% | - Planning and preparation steps - Environment and configuration prerequisites - Hardware and software compatibility verification |
| Topic 3: Post-Installation / Post-Upgrade | 20% | - Configuration optimization - Troubleshooting and issue resolution - Validation and verification procedures |
| Topic 4: Installation | 23% | - Network and storage setup - System initialization and configuration - Physical installation procedures |
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NEW QUESTION # 75
Which NVRAM bays are always populated on the FlashArray//XR2/3?
Answer: B
Explanation:
The FlashArray//XR2 and //XR3 architectures utilize dedicated NVRAM modules to provide the non-volatile write cache necessary for acknowledging writes safely before they are destaged to flash. These chassis are equipped with multiple NVRAM bays (labeled NVB0 through NVB3).
For standard configurations, specifically the //X10, //X20, and //X50 models, the system requires a redundant pair of NVRAM modules to function. These are always installed in NVRAM bays 0 and 1.
Bays 0 and 1 form the primary high-availability pair. If one fails, the other retains the data, and the system can continue to operate (though often in write-through mode or with alerts).
Higher-end models like the //X70 and //X90 populate all four bays (0-3) to provide the larger write buffer required for their higher throughput capabilities.
However, since the question asks which bays are always populated (i.e., the minimum requirement for the platform to function across the board), the answer is the foundational pair in slots 0 and 1. An Implementation Engineer must ensure these specific slots are populated first during any chassis maintenance or upgrade.
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NEW QUESTION # 76
A customer would like to reduce SafeMode settings for retention and eradication with their current policy.
How is authorization obtained to make the requested changes?
Answer: C
Explanation:
Reducing SafeMode retention and eradication settings requires approval from two designated SafeMode approvers via Pure1's step-up authentication to ensure secure and authorized policy changes.
NEW QUESTION # 77
An Implementation Engineer performing an inventory of hardware for an NDU from an FlashArray//X70R2 to an FlashArray //X90R3 and discovers a complete FlashArray//X90R3 was shipped in place of an NDU kit. What is the minimum hardware the Implementation Engineer should use from this array to complete the NDU?
Answer: B
Explanation:
To complete the Non-Disruptive Upgrade (NDU) from an //X70R2 to an //X90R3 using a fully shipped array, the Implementation Engineer must extract and use the Controllers and NVRAM modules.
Stateless Architecture: The FlashArray upgrade philosophy allows the chassis and data drives (Data Packs) to remain in place while the compute (controllers) and cache (NVRAM) are swapped.
Component Compatibility:
Controllers: The X90R3 controllers provide the upgraded CPU/performance required.
NVRAM: The NVRAM modules (located in the chassis front or rear slots depending on generation, but logically paired with controller performance) often differ between generations (R2 vs. R3) and performance tiers (70 vs. 90). The X70R2 NVRAM modules are typically not compatible with X90R3 controllers. Therefore, the engineer must swap the NVRAM modules along with the controllers to ensure the write cache is recognized.
Power Supplies: Both the X70R2 and X90R3 utilize the same high-capacity 1600W Power Supply Units. Unless the existing PSUs are faulty, they do not technically need to be swapped for the system to function, making "Controller and NVRAM" the precise minimum requirement for the logic upgrade.
NEW QUESTION # 78
What command will view NVRAM install and update status?
Answer: A
Explanation:
The command purehw list --all is the correct CLI instruction to view the comprehensive status of all hardware components, including the NVRAM modules.
Command Scope: While purehw list provides a general hardware summary, the --all flag (or specifying --type nvram) ensures that granular details about the NVRAM modules-such as their presence, health status, and firmware/update status-are displayed.
NVRAM Context: In FlashArray models that utilize dedicated NVRAM modules (like the FA-400, //M, or specific //X configurations), these components are critical for write acknowledgement. During an upgrade or installation, verification that these modules are "healthy" and "idle" (not destaging) is mandatory.
Incorrect Options:
purearray list (Option A) displays high-level array attributes like the array name, ID, and overall OS version, but not component-level hardware status.
puredrive list (Option B) is specifically for managing the storage media (SSDs/DirectFlash Modules) and does not report on the non-volatile RAM cache modules housed in the controller or chassis.
NEW QUESTION # 79
An Implementation Engineer performs a controller upgrade. What is the command to check I/O health?
Answer: C
Explanation:
The command to check I/O health and validate connectivity after a controller upgrade is purehost monitor --balance.
Following an upgrade (especially after a controller reboot or failover/giveback), it is essential to verify that the host Multipath I/O (MPIO) drivers have re-established connectivity to all paths.
purehost monitor: Displays real-time performance statistics (IOPS, Bandwidth, Latency) for connected hosts.
--balance: This specific flag breaks down the metrics per initiator (HBA port) for each host.
Why it's used: An Implementation Engineer uses this to look for "imbalanced" flow. If one initiator shows high IOPS and another shows zero, it indicates a dead path, a zoning issue, or an MPIO driver that failed to recover the path to the upgraded controller. Options A and B provide static configuration lists (mappings and WWNs) but do not show live I/O flow, making them insufficient for health monitoring.
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NEW QUESTION # 80
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