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質問 # 26
Which PCI cards must be validated on the Bill of Materials (BOM) to allow an Implementation Engineer to attach a DirectFlash Shelf to a FlashArray//XL130R5?
正解：C
解説：
The FlashArray//XL series (such as the XL130R5) utilizes a modern backend connectivity architecture for its expansion shelves, specifically the DirectFlash Shelf (DFS). Unlike older generations that might have used SAS (Serial Attached SCSI) for shelf connectivity, the //XL architecture relies on high-speed Ethernet with RoCE (RDMA over Converged Ethernet) to communicate with external media shelves. This ensures that the NVMe drives in the shelf perform with the same low latency as those in the head unit.
To attach a DirectFlash Shelf to a FlashArray//XL130R5, the chassis must be populated with specific PCIe interface cards designated for shelf back-end connectivity. The correct part for this is the FA-XL-100G Ethernet/RoCE 2-Port card. This card provides the necessary 100 Gigabit Ethernet bandwidth and RoCE protocol support required for the NVMe-oF (NVMe over Fabrics) backend fabric that Pure Storage uses.
It is crucial to distinguish this from host-facing cards. While an "iSCSI/RoCE" card exists, the shelf connectivity specifically utilizes the "Ethernet/RoCE" designation in the BOM to differentiate backend fabric ports from frontend host ports. The 200G options are generally reserved for host connectivity or inter-array clustering in specific high-performance setups, but the standard validated card for connecting the DFS to the
//XL130R5 is the 100G Ethernet/RoCE adapter. Verifying this line item on the BOM prevents onsite delays where the engineer might otherwise find themselves with incompatible ports for the expansion shelves.
質問 # 27
Which FlashArray//XL DirectMemory Modules (DMMs) configuration condition is true?
正解：D
解説：
FlashArray//XL architectures offer the ability to leverage DirectMemory Modules (DMMs) to drastically accelerate read-intensive workloads. DMMs are specialized drives built on Storage Class Memory (SCM) technologies, such as Intel Optane. They act as a high-speed read cache tier, sitting seamlessly between the array's ultra-fast NVRAM (which handles incoming writes) and the standard DirectFlash Modules (which provide the bulk capacity).
Because the entire purpose of a DirectMemory Module is to provide the absolute lowest read latency possible, physical proximity to the controller's CPUs and direct access to internal PCIe lanes is mandatory. Therefore, DMMs must be installed directly into the primary FlashArray chassis in specifically designated slots.
Installing DMMs into an external DirectFlash Shelf (DFS) is strictly prohibited and physically unsupported.
Routing read-cache traffic across an external NVMe-oF (RoCE) backend fabric-even at 100GbE speeds- would introduce microsecond latency overheads that completely defeat the performance benefits of Storage Class Memory. Furthermore, DMMs share the exact same physical U.2/NVMe drive slot form factor as standard capacity DFMs (making Option C false), and they are supported across multiple array models beyond just the //XL 170 (making Option B false). An Implementation Engineer must strictly validate the chassis population rules before inserting DMMs to ensure the system recognizes the cache tier correctly upon initialization.
質問 # 28
Which I/O card type is compatible across all FlashArray models?
正解：B
解説：
The Fibre Channel (FC) I/O card type is the only option listed that is universally compatible and supported across all FlashArray models, from the entry-level //X10 and //X20 up to the high-end //X90 and //XL.
* Fibre Channel: Pure Storage architectures rely heavily on Fibre Channel as the primary enterprise storage protocol. All chassis generations and controller sizes feature PCIe risers compatible with Pure's standard 16Gb or 32Gb Fibre Channel HBAs.
* Ethernet/iSCSI: While all arrays support iSCSI, the physical card type varies.
* 10GBase-T: This refers to "copper" Ethernet (RJ45). This card type is not supported on all models. High-end FlashArrays (like the //X70, //X90, and //XL) typically utilize SFP+ or QSFP28 cages for optical connectivity (10/25GbE or 40/100GbE) and do not standardly support
10GBase-T copper cards due to power and latency characteristics.
* Therefore, while the protocol (iSCSI) is supported everywhere, the specific physical card (10GBase-T) is not. Fibre Channel cards remain the consistent hardware constant across the entire product line.
質問 # 29
An Implementation Engineer is installing a second DirectFlash Shelf (DFS) on a FlashArray//XR4 controller. How should the Implementation Engineer complete the installation?
正解：A
解説：
The FlashArray//XR4 introduces a new chassis layout and PCIe slot numbering scheme compared to previous generations. For expansion connectivity, specific slots are designated for the backend SAS or Ethernet/RoCE fabric cards that connect to DirectFlash Shelves.
According to the //XR4 hardware guide and expansion best practices, PCIe slot 3 is the designated location for the additional expansion interface card required when adding a second DirectFlash Shelf (or for specific shelf configurations). Slots 0 and 1 are often reserved for host I/O or other functions, and slot numbering/priority is strict to ensure the BIOS and Purity software correctly recognize the card function.
Installing the card in the wrong slot (like slot 0 or 4, if those are reserved for other uses or primary I/O) could result in the shelf not being detected, the array failing to boot, or suboptimal performance due to PCIe lane allocation. Therefore, the engineer must install the DFS expansion card into PCIe slot 3 and cable the second shelf to the ports on that specific card to ensure a supported and functional configuration.
質問 # 30
Which ports are used by default for replication on a FlashArray//XR4?
正解：C
解説：
The FlashArray//XR4 maintains the standard port assignment convention established in previous generations for its onboard Ethernet interfaces.
ETH2 and ETH3 are the default ports designated for Replication traffic.
ETH0 and ETH1 are reserved for Management.
ETH2 and ETH3 are configured by Purity defaults to handle the heavy bandwidth of asynchronous or synchronous replication.
While these assignments can be modified in software, the physical ports labeled eth2 and eth3 on the rear of the chassis are the intended primary interfaces for this function. Implementation Engineers should cable these ports to the replication network switches during the initial install.
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質問 # 31
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