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| Section | Objectives |
|---|---|
| Topic 1: Upgrade | - Controller and drive firmware upgrades - Hardware component swaps and shelf upgrades - Purity upgrade procedures and version management |
| Topic 2: Install | - Validate prerequisites and connect components - Hardware setup and cabling requirements - Initial configuration and system bring-up procedures - Confirm system readiness before production deployment |
| Topic 3: Post-Install/Upgrade | - Establish monitoring baselines - Optimize configuration settings - Verify system performance and validate data integrity - Integrate with existing storage networks - Confirm FlashArray meets performance targets |
| Topic 4: Pre-Install | - Document pre-flight checks to minimize downtime and risk - Plan capacity and assess current infrastructure - Determine if best practices are met for deployment readiness - Validate site-survey data prior to installation - Identify compatibility requirements - Prepare migration strategies - Evaluate existing workloads and determine upgrade paths |
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NEW QUESTION # 182
When adding a data pack into a FlashArray chassis or a DFS shelf, the drives show "unrecognized" status when running puredrive list.
What is the cause of this status on the newly inserted drives?
Answer: D
Explanation:
When expanding capacity on a Pure Storage FlashArray, it is critical to understand the distinction between normal drive insertion states and hardware fault states. As established in previous deployment steps, when a standard, supported DirectFlash Module (DFM) is inserted into a healthy array, it typically enters an
"unadmitted" state. This means the hardware is fully recognized, but the system is securely waiting for the administrator to manually claim the drives using puredrive admit.
However, if an Implementation Engineer inserts a new data pack and the puredrive list command reports the status strictly as "unrecognized," this indicates a deeper software-to-hardware mismatch.
The Purity//FA operating system relies on an internal hardware dictionary (including specific drivers and firmware profiles) to communicate with the custom NVMe flash modules. If a customer purchases a newly released, next-generation DFM (for example, a higher-density QLC drive or a newly manufactured DFM with an updated internal NAND controller), an older version of Purity simply will not know how to interact with it.
Because the older OS lacks the required hardware definitions, it flags the drive as "unrecognized." To resolve this issue and proceed with the capacity expansion, the Implementation Engineer must first perform a non- disruptive upgrade of the Purity operating system to a version that officially supports the new drive's Bill of Materials (BOM).
NEW QUESTION # 183
During a hardware NDU from FlashArray//XR2 or XR3 to an XR4 model, which default service on-board ports are NO longer present in the XR4 controller design?
Answer: C
Explanation:
In the architectural evolution from FlashArray//XR2 and //XR3 to the FlashArray//XR4, Pure Storage made significant changes to the controller's rear panel and I/O design to accommodate higher performance and PCIe Gen 4 capabilities. One of the most critical changes for an Implementation Engineer to plan for during a hardware Non-Disruptive Upgrade (NDU) is the removal of the onboard, default iSCSI ports that were present on previous generations.
On //XR2 and //XR3 controllers, there were onboard Ethernet ports often used for iSCSI host connectivity without requiring a discrete PCIe adapter. However, the //XR4 controller design removes these dedicated onboard iSCSI ports to streamline the motherboard design and shift host I/O strictly to PCIe add-in cards. The
//XR4 retains onboard ports specifically for Management (Mgmt) and Replication connectivity, ensuring that administrative access and array-to-array replication can still be maintained without additional hardware.
Consequently, if a customer was relying solely on the onboard ports for iSCSI traffic on their legacy //XR2 or
//XR3, the Bill of Materials (BOM) for the upgrade to //XR4 must include discrete Ethernet/iSCSI PCIe cards to migrate those connections. Failure to identify this architectural difference during the pre-upgrade inventory can result in a loss of host connectivity or an inability to cable the new controllers correctly, as the expected physical ports simply will not exist on the new chassis.
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NEW QUESTION # 184
During an NDU, when is the Implementation Engineer required to install additional NVRAM modules in slots
2 and 3?
Answer: B
Explanation:
This scenario highlights a critical architectural transition point within the Pure Storage FlashArray product line. The arrays utilize dedicated NVRAM modules to safely ingest and acknowledge incoming writes before destaging them to the capacity flash drives.
On the lower to mid-range models (such as the //X10, //X20, and //X50), the system requires only two NVRAM modules to maintain a highly available, mirrored write cache. These are physically installed in the central chassis slots NVB0 and NVB1. However, the higher-end, performance-heavy models (such as the
//X70 and //X90) boast significantly more processing power and ingest bandwidth. To support these massive workloads without creating a cache bottleneck, the architecture mandates four NVRAM modules, filling slots NVB0, NVB1, NVB2, and NVB3.
Therefore, when performing an inter-generational, cross-model Hardware Non-Disruptive Upgrade (HWNDU) from an //X50 to an //X70 , the Implementation Engineer is traversing that architectural boundary.
While performing the controller swaps, the engineer is strictly required to install two additional, newly shipped NVRAM modules into the previously empty bays NVB2 and NVB3. If they fail to add these modules, the new //X70 controllers will detect a cache hardware deficiency and refuse to initialize, halting the upgrade process. Options B, C, and D do not cross this 2-to-4 NVRAM threshold.
NEW QUESTION # 185
During a FlashArray//X to FlashArray//XL hardware upgrade, when should the Implementation Engineer insert the DFMd modules into the FlashArray//XL?
Answer: B
Explanation:
Upgrading from a FlashArray//X to a FlashArray//XL involves a significant architectural change, often requiring a data migration or a specific "chassis replacement" workflow known as a Data-in-Place upgrade where the new chassis temporarily acts as an expansion shelf. In this specific procedure, the new FlashArray//XL chassis is not immediately populated with its final drives (DFMDs) before power-on because it first needs to be configured to accept data or join the cluster in a controlled state.
The procedure requires the Implementation Engineer to boot the FlashArray//XL chassis first and configure it into Shelf Mode (SPM). Only after the chassis is successfully running in this mode-effectively acting as a passive SAS/Ethernet attached shelf to the existing controllers-are the DirectFlash Modules (DFMd) inserted.
Inserting them earlier could cause the array to attempt a full boot sequence or initialize a new array instance, complicating the upgrade logic. By waiting until Shelf Mode is confirmed, the engineer ensures that the modules are recognized correctly as part of the migration target resources, allowing Purity to manage the layout and data redistribution correctly from the source array.
=========
NEW QUESTION # 186
What command should be used to check the shelf cable connections?
Answer: C
Explanation:
To specifically verify the shelf cable connections and validate the SAS topology during an installation, the correct command is storage_view.py config.
While standard Purity CLI commands like purehw list (Option B) can show the presence and general status of enclosures, they often do not provide the granular, low-level details of the SAS cabling map required to troubleshoot or verify physical redundancy paths (Side A vs. Side B connectivity).
storage_view.py is a specialized Python utility script included in the Purity operating system, primarily intended for use by Implementation Engineers and Support. Running storage_view.py config (or similar arguments like enclosures) outputs a visual or tabular representation of the backend cabling, explicitly showing how the controllers are chained to the expansion shelves. This allows the engineer to confirm that the cabling matches the strict "stacking" rules (e.g., verifying that the SAS loops are closed and redundant) and to identify issues like cross-cabling or disconnected paths that a simple "status=healthy" flag might miss during the initial build.
NEW QUESTION # 187
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