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NVIDIA NCP-AII Exam Syllabus Topics:

Topic	Details
Topic 1	System and Server Bring-up: Covers end-to-end physical setup of GPU-based AI infrastructure, including BMC OOB TPM configuration, firmware upgrades, hardware installation, and power and cooling validation to ensure servers are workload-ready.
Topic 2	Cluster Test and Verification: Covers full cluster validation through HPL and NCCL benchmarks, NVLink and fabric bandwidth tests, cable and firmware checks, and burn-in testing using HPL, NCCL, and NeMo.
Topic 3	Control Plane Installation and Configuration: Covers deploying the software stack including Base Command Manager, OS, Slurm Enroot Pyxis, NVIDIA GPU and DOCA drivers, container toolkit, and NGC CLI.
Topic 4	Physical Layer Management: Covers configuring BlueField network platform devices and setting up Multi-Instance GPU (MIG) partitioning for AI and HPC workloads.
Topic 5	Troubleshoot and Optimize: Covers identifying and replacing faulty hardware components such as GPUs, network cards, and power supplies, along with performance optimization for AMD Intel servers and storage.

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NVIDIA AI Infrastructure Sample Questions (Q150-Q155):

NEW QUESTION # 150
You are troubleshooting slow I/O performance in a deep learning training environment utilizing BeeGFS parallel file system. You suspect the metadata operations are bottlenecking the training process. How can you optimize metadata handling in BeeGFS to potentially improve performance?

A. Configure BeeGFS to use a different network protocol with lower overhead.
B. Increase the number of storage targets (OSTs) to distribute the data across more devices.
C. Increase the number of metadata servers (MDSs) and distribute the metadata load across them.
D. Implement data striping across multiple OSTs.
E. Enable client-side caching of metadata on the training nodes.

Answer: C

Explanation:
Metadata operations like file creation, deletion, and attribute modification can become a bottleneck in parallel file systems. Increasing the number of metadata servers (MDSs) (option C) and distributing the metadata load across them is the direct way to improve metadata handling performance in BeeGFS.

NEW QUESTION # 151
A system administrator needs to configure a BlueField DPU and enable RShim on the baseboard management controller (BMC). Which command should be executed?

A. systemctl restart rshim
B. systemctl enable bmc-rshim.service
C. ipmitool raw 0x32 0x6a 1
D. scp <path_to_bfb> root@<bmc_ip>:/dev/rshim0/boot

Answer: C

Explanation:
In NVIDIA BlueField DPU architectures, theRShim (Remote-Shim)interface provides a vital communication channel between the DPU and the host or BMC, typically used for early-stage provisioning, console access, and firmware loading. While the DPU is usually managed via the host's PCIe bus, certain data center configurations require the DPU to be managed out-of-band via the server's Baseboard Management Controller (BMC). To enable this capability, a specific low-level command must be sent to the BMC to toggle the RShim functionality over the internal USB-to-BMC bridge. The command ipmitool raw 0x32 0x6a 1 is the verified raw IPMI hex code used in NVIDIA DGX and certified systems to enable the BMC-to-DPU RShim path. Once enabled, the BMC can "see" the DPU as a USB device, allowing the administrator to push a BlueField Boot (BFB) image to /dev/rshim0/boot for OS installation even if the host CPU is powered off or unresponsive. Option B and C are host-side service commands that assume the driver is already loaded and the hardware path is active, whereas the raw IPMI command is required to enable the hardware path itself.

NEW QUESTION # 152
You are configuring a network for a distributed training job using multiple DGX servers connected via InfiniBand. After launching the training job, you observe that the inter-GPU communication is significantly slower than expected, even though 'ibstat' shows all links are up and active. What is the MOST likely cause of this performance bottleneck?

A. The RDMA memory registration limit is too low, causing frequent memory registration and unregistration overhead.
B. The CPU frequency scaling governor is set to 'powersave', limiting CPU performance.
C. The default MTU size of 1500 is too small for efficient large data transfers.
D. Incorrect placement of GPUs across NUMA nodes, leading to increased inter-node latency.
E. The InfiniBand subnet manager (SM) is configured incorrectly or experiencing performance issues (e.g., path selection is suboptimal, congestion control is not enabled).

Answer: E

Explanation:
While the other options could contribute to performance issues, the subnet manager (SM) is the MOST likely culprit. A poorly configured or malfunctioning SM can lead to suboptimal path selection (e.g., routing traffic through congested links or longer paths), which significantly increases latency and reduces bandwidth. Congestion control mechanisms, if not properly configured, can also fail to mitigate congestion, leading to packet loss and retransmissions, further degrading performance. Checking the SM logs and configuration is the first step in diagnosing this issue. Incorrect NIJMA placement, small MTIJ, powersave governor, and memory registration limits could also impact performance but are less likely to be the primary bottleneck if the links are up.

NEW QUESTION # 153
As the infrastructure lead for an NVIDIA AI Factory deployment, you have just uploaded the latest supported firmware packages to your DGX system. It is now critical to ensure all hardware components run the new firmware and the DGX returns to full operational capability. Which sequence best guarantees that all relevant components are correctly running updated firmware?

A. Perform a software-driven restart on the operating system of every compute node, then use advanced tools to check firmware status, and reissue update commands if any firmware appears inactive afterward.
B. Initiate a cold power cycle on all node trays to activate firmware, follow with a DGX reboot procedure, and use the management interface to finish activating CPLD firmware on the host.
C. Execute a single AC power cycle on the DGX after the update process, then reset the software stack and verify status using diagnostic commands on each node for confirmation of all component updates.
D. Initiate a cold power cycle on the system to activate firmware for components, reset the BMC using the recommended command, and perform an AC power cycle to ensure EROT and CPLD firmware is activated.

Answer: D

Explanation:
Updating an NVIDIA DGX system (like the H100) is a multi-layered process because the system contains numerous programmable logic devices, including CPLDs, FPGAs, and the EROT (Electrically Resilient Root of Trust) modules. Many of these low-level hardware components cannot be updated via a simple operating system reboot. NVIDIA's official firmware update procedure requires a specific sequence to "commit" the new images to the hardware. First, the update utility (like nvfwupd) writes the images to the flash memory. To activate them, a "Cold Power Cycle" (removing and restoring power) is necessary to force the hardware to reload from the newly written flash blocks. Furthermore, because the BMC (Baseboard Management Controller) orchestrates the power-on sequence and monitors the EROT, it must be reset (Option D) to synchronize its state with the new component versions. Finally, an "AC Power Cycle" ensures that even the standby-power components, such as the power delivery controllers and CPLDs, undergo a full hardware reset.
Skipping these steps can result in "Incomplete" or "Mismatched" firmware versions, where the OS reports one version while the hardware continues to run old, potentially buggy code in the background.

NEW QUESTION # 154
You are running a distributed training job across multiple nodes, using a shared file system for storing training dat a. You observe that some nodes are consistently slower than others in reading data. Which of the following could be contributing factors to this performance discrepancy? Select all that apply.

A. Different CPU architectures on the nodes.
B. Variations in the speed of the local temporary storage (e.g., /tmp) used for intermediate files.
C. Insufficient RAM on the slower nodes for caching data.
D. Uneven data distribution across the storage nodes.
E. Network congestion between the slower nodes and the storage system.

Answer: C,D,E

Explanation:
Network congestion (A) can directly impact the data transfer rate between the slower nodes and the storage. IJneven data distribution (B) means some storage nodes are more heavily loaded, leading to slower response times for nodes accessing data on those overloaded nodes. Insufficient RAM (D) limits the amount of data that can be cached locally, forcing more frequent reads from the slower storage system. CPU architecture (C) primarily affects compute performance, not 1/0. The speed of /tmp (E) is relevant if the training job uses local storage extensively for temporary files, but the question focuses on reading training data from the shared file system.

NEW QUESTION # 155
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