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| Section | Objectives |
|---|---|
| Upgrade | - Hardware component swaps and shelf upgrades - Controller and drive firmware upgrades - Purity upgrade procedures and version management |
| Install | - Hardware setup and cabling requirements - Validate prerequisites and connect components - Initial configuration and system bring-up procedures - Confirm system readiness before production deployment |
| Pre-Install | - Evaluate existing workloads and determine upgrade paths - Validate site-survey data prior to installation - Plan capacity and assess current infrastructure - Prepare migration strategies - Determine if best practices are met for deployment readiness - Document pre-flight checks to minimize downtime and risk - Identify compatibility requirements |
| Post-Install/Upgrade | - Confirm FlashArray meets performance targets - Optimize configuration settings - Verify system performance and validate data integrity - Establish monitoring baselines - Integrate with existing storage networks |
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NEW QUESTION # 11
How many chassis capacity drive slots come standard on a FlashArray//X Gen 2 chassis?
Answer: D
Explanation:
Understanding the physical chassis layout of the Pure Storage FlashArray is essential for capacity planning and hardware installation. The FlashArray//X Gen 2 (and Gen 3) utilizes a highly efficient 3U chassis design.
When looking at the front of a standard //X chassis, there are a total of 24 physical module bays. However, these bays serve fundamentally different architectural purposes:
* Capacity Drive Slots: There are exactly 20 slots strictly dedicated to capacity drives (DirectFlash Modules, or DFMs). These are numbered 0 through 19 and are where the data packs are installed to provide raw storage capacity.
* NVRAM Slots: The remaining 4 slots, located centrally in the chassis, are dedicated exclusively to NVRAM modules (NVB0, NVB1, NVB2, and NVB3). These provide the highly available, non-volatile write cache for the array and cannot be used for capacity expansion.
Therefore, when an Implementation Engineer is assessing the chassis for data pack expansion or module upgrades, there are exactly 20 standard capacity drive slots available before an external DirectFlash Shelf (DFS) must be added. (Note: FlashArray//XL utilizes a larger 5U chassis with 40 capacity slots, but the standard //X remains at 20).
NEW QUESTION # 12
Which action should an Implementation Engineer take to confirm that all volumes connected to a host are automatically in a protection group?
Answer: B
Explanation:
To ensure that all volumes connected to a specific host are automatically protected, the Implementation Engineer should add the Host object as a member of the Protection Group (PGroup).
Purity's protection policy logic allows for membership at different granularities:
Volume Membership: You can add individual volumes to a PGroup. However, if a new volume is provisioned and attached to the host later, it will not be protected until an admin manually adds it to the PGroup (making Option A and B manual, error-prone processes).
Host/Host Group Membership: By adding the Host entity to the Protection Group, Purity applies a policy inheritance rule. Any volume currently connected to that host-and crucially, any volume attached in the future-automatically inherits the protection policy (snapshot schedule, replication target) of that group. This "set and forget" configuration is the best practice for ensuring compliance and data safety without requiring manual intervention for every provisioning task.
NEW QUESTION # 13
Before installing array rails, where should the cage nuts be placed?
Answer: A
Explanation:
Cage nuts should be placed in the lowest square hole of the lowest rack unit (RU) where the array rails will be installed to ensure proper alignment and support.
NEW QUESTION # 14
An Implementation Engineer is deploying a FlashArray//XLR5 with two DirectFlash Shelves. The engineer wants to ensure the shelves are installed in the preferred PCIe slots to achieve optimal performance and support.
Which PCIe slots should the Implementation Engineer use for connecting the DFS shelves?
Answer: C
Explanation:
When deploying a high-end Pure Storage FlashArray//XL (which utilizes a massive 5U chassis), the PCIe slot architecture differs significantly from the standard 3U //X series. The //XL is designed for extreme backend NVMe-oF (RoCE) bandwidth to support multiple DirectFlash Shelves (DFS) without creating bottlenecks.
According to the official FlashArray//XL cabling matrix and hardware implementation guides, specific PCIe slots are strictly reserved and optimized for backend expansion. To connect external DirectFlash Shelves, the Implementation Engineer must populate the 100GbE RoCE backend expansion cards into PCIe Slot 0 and PCIe Slot 6 .
When cabling the first two external shelves (typically designated logically as SH8 and SH9 depending on the loop configuration), the preferred mapping routes the NVMe-oF connections from the shelf modules to Slot 0 for one shelf and Slot 6 for the other. Utilizing other slots, such as Slot 1, 7, or 8, is incorrect because those are primarily reserved for frontend host connectivity (like 32G/64G Fibre Channel or frontend NVMe/TCP host bus adapters). Incorrectly slotting the backend cards will result in hardware_check.py validation failures, sub-optimal NUMA node alignment, and potential backend network instability.
NEW QUESTION # 15
When installing the first DirectFlash Shelf on a FlashArray//XR2/3, what mezzanine ports are used on the controllers?
Answer: C
Explanation:
When installing the first DirectFlash Shelf on a FlashArray//XR2/3, mezzanine ports ETH6 and ETH9 on the controllers are used for connectivity.
NEW QUESTION # 16
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